A modern day processor may include many core processors, herein termed cores. In such a multicore processor, a scheduler may apportion tasks among the cores. In order to know the availability of core processing cycles, a performance monitor unit (PMU) may be used to monitor the performance of the cores and feed that information to the scheduler. Given the high frequency of processor operation and the multiplicity of cores, the amount of information processed by the PMU and transferred to the scheduler can be large, inefficiently using many processing and data bus (processor-memory) cycles.
The Shannon/Nyquist sampling theorem tells us that in order not to lose information when uniformly sampling a signal, the signal must be sampled at least two times faster than the bandwidth of the signal. In many applications, the Nyquist rate can be so high that there are too many samples and they must be compressed in order to store or transmit them. In other applications, increasing the sampling rate or density beyond the current state-of-the-art is very expensive. Data sampling and data compression has been, generally, a two-step process involving a first step of sampling and possibly storing the data, and a second step of compressing the data. In many applications, a high capacity, high speed data bus is needed to transfer the non-yet-compressed sampled data.
A more general linear measurement scheme coupled with an optimization in order to acquire certain kinds of signals at a rate significantly below the Nyquist rate has been developed. This scheme reduces the number of measurements required to completely describe a signal by exploiting the compressibility of the signal. Thus signal compression occurs during the sampling process. This technique is termed compressive sampling or compressed sensing.